CAP ARRAY 0.1UF 10V X5R 0504
其他名称:ECJUVB1A104M P11982CT P11982DKR P11982TR P11982TR-NDR
制造商Panasonic Electronic Components
封装/外壳0504(1410 公制)
大小 / 尺寸0.054" 长 x 0.039" 宽(1.37mm x 1.00mm)
高度 - 安装(最大值)0.035"(0.90mm)
电压 - 额定10 V
Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC48 Œ Handling Precautions Multilayer Ceramic Capacitors Series: ECJ, ECY, ECD Operating Conditions and Circui t Design1.Circ uit Design 1.1 Operating Temper ature and Storage Temperature The speciÞ ed ÒOperating Temperature RangeÓ found in the speciÞ cations is th e absolute maximum and minimum temperature rating. Every Capacitor shall be operated within the speciÞ ed ÒOperating Temperature RangeÓ. The capacitors mo unted on PC B shall be stored without operat ing within the specified ÒStorage Temperature RangeÓ in the Specifications. 1.2 Design of Vo ltage Application Capacitors shall not be operated in excess of the speciÞ ed ÒRated VoltageÓ in the SpeciÞ cation. If voltage ratings are exceeded, the Capacitors could result in failure or damage . The designed peak DC and AC voltages applied to the Capacitors, shall be within the sp eciÞ ed ÒRated VoltageÓ. In case of AC of pulse voltage, the peak voltage shall be within the speciÞ ed ÒRated VoltageÓ. If high frequency voltage or fast rising pulse voltages are continuously applied, even when within the ÒRated VoltageÓ, consider that the reliability of the Ca pacitor may change. Continuous application of those types of voltages can affects the life of the Capacitors. 1.3 Charging and Discharging Current The Capacitors shal l not be operated beyond the speciÞ ed ÒMaximum Charging /Discharging Curr ent RatingsÓ in the speciÞ cations. For safety re asons Panasonic does not recommen d use in applications with low impedance circuitry such as Òsecondary power circuitsÓ. 1.4 Temperatur e Rise due to Dielectric Loss of the Capacitors The ÒOperating Te mperature RangeÓ mentioned above shall include a maximum surface temperature rise of 20 ¡C, whic h is caused by the Dielectric loss of the Capacitor and applied electrical stresses such as voltage, frequency and wave form . It is recommended to measure an d check the ÒSurface Temperature of the CapacitorÓ in the application at room temperature (up to 25 ¡C). 1.5 Environmenta l Restrictions The Capacitors shal l not be operated and/or stored under th e following conditions. (1) Environmen tal conditions (a) Unde r direct exposu re to water or salt water (b) Under conditions wh ere wate r can condense and/or de w can form (c) Under conditio ns containing corrosiv e gases such as hydrogen sulÞ de, sulfurous acid, chlorine and ammonia (2) Mechanical conditions Under severe conditions of vibration or impact beyond the speciÞ ed conditions found in the SpeciÞ cations 1.6 DC Voltage Characteristics The Capacitors (Class 2) empl oy dielectric ceramics with dielectric constant having voltage dependency, and if the applie d DC voltage is high, capacitance may broadly change. For the speciÞ ed capacitance, the following should be conÞ rmed. Safety Precautions Multilayer Ceramic Chip Capacitors (hereafter referred to as ÒCap acitorsÓ) should be used for general purpose applications found in consumer electronics (audio/visual, home, ofÞ ce, information & communication) equipment. When subjected to severe electrical, environmental, and/or mechanical stress beyond the speciÞ cations, as noted in the Ratings and SpeciÞ ed Conditions section, the capacitor may fail in a short circuit mode or in an open-circuit mode. This case results in a burn-out, smoke or ß aming. For products whic h require high safety levels, please carefully consider how a single malfunction can affect your product. In order to ensure the safety in the case of a single malfunction, please design products with fail-safe, such as setting up protecting circuits, etc. For th e following applications and conditions, please contact us for additional speciÞ cations not found in this document. á When your application may have difÞ culty complying with the safety or handling precautions speciÞ ed below. á For an y applications where a malfunction with this prod uct may directly or indirectly cause hazardous conditions which could resu lt in death or injury; 1 Aircraft and Aerospace Equipment (artiÞ cial satellite, rocket, etc.) 2 Submarine Eq uipment (submarine repeating equipment, etc.) 3 Transportation Equipment (motor vehicles, ai rplanes, trains, ship, trafÞ c signal controllers, etc.) 4 Power Generation Control Equipment (atomic power, hydroelectric power, thermal power plant control system, etc.) 5 Medical Equipmen t (life-support equipment, pacemakers, dialysis controllers, etc.) 6 Information Processing Equipment (large scale computer systems, etc.) 7 Electric Heating Appliances, Combustion devices (gas fan heaters, oil fan heaters, etc.) 8 Rotary Motion Equipment 9 Security Systems J And an y similar types of equipment 00Sep. 2008 Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC49 Œ 0DCvoltage(V) oC/C(%) 0Time(h) oC/C(%) 0logT Time(h) oC/C(%) 0logT HeatTreatment LANDLANDSMDabcSolderresist abcSMDLANDcabP/2P cabP< >(1) If capacitance change caused by the applied voltage is within the allowable range, or if its application allows unlimited capacitance change. (2) DC voltage char acteristics demonstrate that even if the applied voltage is under the rated voltage, the capacitanc e change rate increases with higher voltage (Capac itance down). Acco rdingly, when the Capacitors are used for circuits with a narrow allowable capacitance rang e such as ti me constant circuits, we recommend applying a lo wer voltage after taking capacitance agin g and the above into account. Capacitance change - DC voltage Under Ordinary Temperature Before an d After Heat treatment 1.7 Capacita nce Ag ingThe cerami c dielectrics of the Capacitors (Class 2) have capacitance aging. Accordingly, when the Capacitors are used for circuits which require a narrow allowable capacitance rang e, such as time co nstant circuits, pay special attention to capacitance aging before use. of the Capacitors may be effective in getting the resonance unde r control with other equipment such as printed circuit boards. Attaching the Capacitors to the printed circui t board by an adhesive may also be effective. 2.Design of Printed Circuit Board 2.1 Selection of Printed Circuit Board When the Capacito rs are mounted and soldered on an ÒAlumina Substrat eÓ, the subs trate inß uences the CapacitorsÕ reliability against ÒTemperature CyclesÓ and ÒHea t shockÓ due to the difference in the thermal expansion coefÞ cient between them. ConÞ rm that the actual board used does not deteriorate the characteristics of the Capacitors. 2.2 Design of Land Pattern (1) Recommen ded land dimensions are shown below. Use the proper amount of solder in order to prevent cracking. Using too much solder places excessive stress on the Capacitors. Size Component Dimens ions abc LWT 02010.60 .30.3 0.2 to 0.30 .25 to 0.30.2 to 0.3 04021.00.50.5 0.4 to 0.50.4 to 0.50.4 to 0.5 0402 0.5 to 0.60.4 to 0.50.5 to 0.6 06031.60.8 0.45 to 0.8 0.8 to 1.00.6 to 0.80.6 to 0.8 08052.01.25 0.6 to 1.25 0.8 to 1.20.8 to 1.00.8 to 1.0 12063.21.6 0.6 to 1.61.8 to 2.21.0 to 1.21.0 to 1.3 12103.22.5 0.85 to 2.5 1.8 to 2.21 .0 to 1.21 .8 to 2.3 05081.252.00.85 0.5 to 0.70.5 to 0.61.4 to 1.9 06121.63.20.85 0.8 to 1.00.6 to 0.72.5 to 3.0 Unit (mm) Recommended land dimensions (Ex.) High Capacitance, Fo r General Electronic Equipment, Low Pro˚ leType, Wide-w idth Type, 100V·200V seri es, 630V series, High-Q capacitors <2Array ty pe, 4 Array type> Size Component Dimensions abcPLWT0504 2 Array 1.371.0 0.60.3 to 0.40 .45 to 0.55 0.3 to 0.4 0.54 to 0.74 0.8 0.3 to 0.60 .4 to 0.7 0.46 to 0.560.71 to 0.91 08054 Array 0.55 to 0.75 0.5 to 0.60.2 to 0.30.4 to 0.6 1206 4 Array 0.9 to 1.10.7 to 0.9 0.35 to 0.45 0.7 to 0.9 Unit (mm) 1.8 Piezoelectricity Dielectrics used for the Capacitors (Class 2) may cause th e following Piezoelectricity (or Electrostriction). (1) If the signal of a speciÞ c frequency is applied to the Capacitors , electric and acoustic noise may be generated by resonating the characteristic frequen- cy, whic h is determined by the dimensions of the Capacitor. As a measure to prevent this phenomenon, changing the size of the Ca pacitor is effective in changing its resonance frequency. In addition, changing the materials of the Capacitors to the Low-loss type, whic h has no (or less) piezoelectricity, or to use Class 1 dielectrics which have no (or less) piezoelectricity. (2) Vibration or impact applied to the Capacitors may cause nois e because mechanical force is converted to electrical sig nals (Especially to circuitry around an ampliÞ er unit). As a measure to prevent this phenomenon, changing the material s of the Capacitor to the Low-loss type, which has no (or less) piezoelectricity, or to Class1 is also available. (3) If a Òwhi ning soundÓ is gene rated it does not indicate a problem with product performance and reliab ility, however, check if this undesirable phenomenon generates noise in your application. To prevent this ph enomenon, changing the CapacitorÕs characteristics, such as size and shape, as shown in (1 ) & (2) above can be effective. In addition, changing the mounting direction 1 The following value is applied as a dimensional tolerance : +0.15/-0.05 mm (L, W and T). 00Sep. 2008 Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC50 Œ (a)Excessiveamount(b)Properamount(c)Insufficientamount Solderresist LandPortiontobe excessivelysoldered Aleadwireof Retro-fittedcomponent Solderingiron Solder(Groundsolder) ChassisElectrodepattern Solderresist Solderresist Solderresist Theleadwireofacomponent withleadwires ABCEDSlitMagnitudeofstressA>B=C>D>E Perforation(2) The size of lands shall be designed to have equal spacing between the right and left sides. If the amount of solder on the righ t land is different from that on the left land , the component may be cracked by stress since the side with a larger amount of solder solidiÞ es later during cooling. Recommended Amount of Solder 2.3 Applications of Solder Resist (1) Solder resist sh all be utilized to equalize the amounts of solder on both sides. (2) Solder resist shal l be used to divide the pattern for the following cases; á Components are arranged closely. á The Capacitor is mounte d near a component with lead wires. á The Capacitor is placed near a chassis. See th e table below. Item Prohibited applications Improved applications by patter n division Mixed mounting with a co mponent with lead wires Arrangement near chassis Retro-Þ tting of component with lead wires Lateral arrangement Prohibited Applic ations and Recommended Applications 2.4 Component Layout The Capacitors/compo nents shall be placed on the PC board so as to have both electrodes subjected to uniform stresses, or to position the component electrodes at right angles to the grid glove or bending line. This should be done to avoid crac king the Capacitors from bending of the PC board after or during placing/mounting on the PC board. (1) To mini mize mechanical stress caused by warp or bending of a PC board, please follow the recommended CapacitorsÕ layout below. Prohibited layoutRecommended layout Layout the Capacito r sideways against the stressing direction (2) The follow ing drawing is for reference since mechanical stress near the dividing/breaking position of a PC board varies depend ing on the mounting posi tion of the Capacitors. (3) The magnitude of mechanic al stress applied to the Capacitors when the circuit board is divided is in the order of push back < slit < V-groove < perforation. Also take into ac count th e layout of the Capacitors and the dividing/b reaking method. 2.5 Mounting Density and Spaces If components are arranged in too narrow a space, the components can be affected by solder bridges and solder balls. Th e space between components should be carefully determined. Precautions for Assembly 1.Storage (1) The Capacitors shall be stored be tween 5 - 40 ¡C and 20 - 70 % RH, not under severe conditions of high temperature and humidity. (2) If stored in a place that is humid, dusty, or contains corrosive gasses (hydrogen sulÞ de, sulfurous acid, hydrogen chloride and ammoni a, etc.), the solderability of the terminal electr odes may deteriorate. In addition, storage in a place subjected to heating and/or exposure to direct sunlight wi ll causes deformed tapes and reels, and component sticking to tapes, both of which can re sult in mounti ng problems. (3) Do no t store components longer than 6 months. Check the solderability of products that have been stored for more than 6 months before use. (4) High dielectric co nstant capacitors (Cla ss 2, char acteristic B, X7R, X5R and F, Y5V) change in capacitance with the passage of time, (Capacitance aging), due to the inherent characteristics of ceramic dielectric materials. The capacitance chan ge can be reversed to the initial value at the time of shippi ng by heat treatment (See 1. Circuit Desi gn, 1-7. Capacitance aging) (5) When the init ial capacitance is measured, the Capacitors shall be heat -treated at 150 +0/-10 ¡C for 1 hour and then subjected to ordinary temp erature and humidity fo r 48±4 hours before measuring the initia l val ues.2.Adhesives for Mounting (1) The amount and vi scosity of an adhesive for mounting shall be such that th e adhesive shall not ß ow off on the land during its curing. (2) If the amount of adhesive is insufÞ cient for mounting, the Capacito r may fall off after or during soldering. (3) If the adhesive is too lo w in its viscosity, the Capacitors may be out of al ignment after or during soldering. (4) Adhesive s for mounting can be cured by ultraviolet or infrared radiation. In or der to prevent the terminal electrodes of the Capacitors from oxidizing, curing shall be done under the fo llowing conditions: 160 ¡C max., fo r 2 minutes max. 00Sep. 2008 Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC51 Œ Supportingpin Thesupportingpindoesnotnecessarily havetobepositionedbeneaththeCapacitor. Supportingpin CrackSeparationofSolder Crack2602400Temperature(ûC)Time3to5s SolderingoTGradualcooling (atordinarytemperature) 60to120s 5.2 Re˜ ow Soldering The reß ow soldering temperature conditions are each temperature curves of Prehea ting, Temp. rise, Heating, Peak and Gradua l cooling. Large temperature difference caused by rapid heat application to the Capacitors may lead to excessive thermal stresses, contributing to the thermal cracks. The Preheati ng temperature requires controlling with great care so that tombstone phenomenon may be prevented. (5) In sufÞ cient curing may cause the Capacitor to fall off after or during soldering. In addition, insulation resistance between terminal electrodes may deteriorate due to moisture absorption. In order to prevent these problems, please observe proper curing conditions. 3.Chip Mounting Consideration (1) When mounting the Ca pacitors/components on a PC board, the Capacitor bodie s shall be free from excessive impact loads such as mechanical impact or stress du e to the positioning, pushing force and displacement of vacuum nozzles du ring mounting. (2) Maintenance an d inspection of the Chip Mounter must be performed regularly. (3) If the bottom dead center of the vacuum nozzle is too low, the Capacitor will crack from excessive force during mounting. The follow ing precautions and recommendations are for your reference. (a) Set an d adjust the bottom dead center of the vacuum nozzles to the uppe r surface of the PC board after correcting th e warp of the PC board. (b) Set th e pushing force of the vacuum nozzle during mounting to 1 to 3 N in static load. (c) For double surface moun ting, apply a supporting pin on the rear surface of the PC board to suppress the bendin g of the PC board in order to minimize the impact of the vacuum nozzles. Typical examples are shown in the table below. ItemProhibited mounting Recommended mounting Single surface mouting Double surface mounting (d) Adjust the vacuum nozz les so that their bottom dead center du ring mounting is not too low. (4) The closing dimensions of the positioning chucks shall be controll ed. Maintenance and replacement of positioning chucks shall be performed regularly to prevent ch ipping or cracking of the Capacitors caused by mechanical im pact during positioning due to worn positioning chucks. (5) Maximum stroke of the nozzle shall be adjusted so that the maximum bend ing of PC board does not exceed 0. 5 mm at 90 mm span. The PC board shall be supporte d by an adequa te number of supporting pins. 4.Selection of Soldering Flux Soldering ß ux may seriously affect the performa nce of the Capacitors. The following shall be conÞ rmed before use. (1) The so ldering ß ux should have a halogen based content of 0.1 wt. % (converted to chlorine) or below. Do not use soldering ß ux with st rong acid. (2) When applying wate r-soluble soldering ß ux, wash the Capacitors sufÞ ciently because the soldering ß ux resi due on the surface of PC boards may deteriorate the insulation resistance on the Capacitors surface. 5.Soldering 5.1 Flow Soldering For ß ow soldering, abnormal and large thermal and mechanical stress, caused by the ÒTemperature GradientÓ between the mounted Capacitors and melted solder in a soldering bath may be applied directly to the Capacitors, resulting in failure and damage of the Capacitors. Therefore it is es sential that soldering process follow these recommended conditions. (1) Applicat ion of So ldering ß ux: The sold ering ß ux shall be applied to the mounted Capacitors thinly and unif ormly by foaming method. (2) Preheating: The mounte d Capacitors/Components shall be pre-heated sufÞ ciently so that the ÒTemperature GradientÓ betwee n the Capacitors/Components and the melted solder shall be 150 ¡C max. (100 to 130 ¡C) (3) Immersion into Soldering Bath: The Capacitors sh all be immersed into a soldering bath of 240 to 260 ¡C for 3 to 5 seconds. (4) Gradual Cooling: The Capacitors sh all be cooled gradually to room ambient temperatur e at cooling temperature rates of 8 ¡C/s max. from 250 ¡C to 170 ¡C and 4 ¡C/s max. from 170 ¡C to 130 ¡C. (5) Flux Cleaning: When the Capacito rs are immersed into a cleaning solvent, be sure that the surface temperatures of the devices do no t exceed 100 ¡C. (6) Performing ß ow soldering once under the conditions shown in the Þ gure below [Recommended proÞ le of Flow soldering (Ex)] will not cause any problems. However, pay attention to the possible warp and bending of the PC board. Recommende d pro˚ le fo r Flow soldering [Ex.] SizeTemp . Tol 0603 to 1206, 0508, 0612 oT < 150 ¡C ItemTemperaturePeriod or Speed 1Preheating 140 to 180 ¡C60 to 120 sec 2Temp. risePreheating temp to Peak temp. 2 to 5 ¡C/sec 3Heating 220 ¡C min.60 sec max. 4Peak 260 ¡C max.10 sec max. 5Gradual coolingPea k temp. to 140 ¡C 1 to 4 ¡C/sec For prod ucts speciÞ ed in individual speciÞ cations, avoid ß ow soldering. 00Sep. 2008 Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC52 Œ TimeGradualcooling5Heating3Peak4Temp.rise 2Preheating160secmax. 60to120sec Temperature( °C)260220180140oTPreheatingGradualcooling 60to120sec3secmax. Recommende d pro˚ le of Re˜ ow soldering [Ex.] SizeTemp . Tol 0201 to 1206, 0508, 06 12, 0504 oT < 150 ¡C 1210 oT < 130 ¡C The rapid cool ing (forced cooling) during Gradual cooling part shou ld be avoi ded, because this may cause defect s such as the thermal cracks, etc. When the Capacito rs are immersed into a cleaning solvent, conÞ rm that the surface temperatures of the devices do not exceed 100 ¡C. Performing reß ow soldering twice under the conditions shown in the Þ gure above [Recommended proÞ le of Reß ow soldering (EX)] will not cause any problems. However, pay atte ntion to the possible warp and bending of the PC board. 5.3 Hand Soldering Hand soldering typica lly causes signiÞ cant temperature change, which may induce excessive thermal stresses inside the Capacitors, resulting in the thermal cracks, etc. In order to prevent any defects, the following should be observed. á The temperat ure of the soldering tips should be controlled with special care. á The direct contact of solderin g tips wi th the Capacitors and/or terminal electrodes should be avoided. á Dismounted Capacitors shall not be reused. (1) Conditio n 1 (with preheating) (a) Soldering: 1.0 mm or below Thread eutectic solder with soldering ß ux in the core. Rosin-based and non-ac tivated ß ux is recommended. (b) Pr eheating: The Capacitors shall be preheated so that the ÒTemperature GradientÓ between the devices and the tip of soldering iron is 150 ¡C or below. (c) Temperature of Iron tip: 300 ¡C max. (The required amount of solder shall be melted in advance on the soldering tip.)(d) Gradual Cooling: After soldering, the Capacitors shall be cooled gradually at room temperature. (2) Condition 2 (without preheating) Hand soldering ca n be performed without preheating, by following the conditions below: (a) Soldering iron tip shall never directly touch the cerami c and terminal el ectrodes of the Capacitors. (b) The land s are sufÞ ciently preheated with a soldering iron ti p before sliding the soldering iron tip to the terminal electrodes of the Capacitor for soldering. SizeTemp. Tol. 0201 to 1206, 0508, 06 12, 0504 oT < 150 ¡C 1210 oT < 130 ¡C Recommende d pro˚ le of Ha nd Solder ing [E x.]ItemCondition Size 0201 to 0805 , 0508, 05041206, 1210, 0612 Temp erature of Iron tip 270 ¡C max. 250 ¡C max. Wattage 20 W max. Shape of Iron tip 3 mm max. Soldering ti me with a soldering iron 3 sec max. 6. Post Soldering Cleaning 6.1 Cleaning Solvent Soldering flux resi due may remain on the PC board if cleaned with an in appropriate solvent. This may deteriorat e the electrical ch aracteristics and reliab ility of the Capacitors. 6.2 Cleaning Conditions InsufÞ cient cleaning or excessive cleaning may impair the electrical characteristics and reliab ility of the Capacitors. (1) InsufÞ cient cleaning can lead to: (a) The haloge n substance found in the residue of soldering ß ux may cause the meta l of terminal electrodes to corrode. (b) The haloge n substance found in the residue of soldering ß ux on the surface of the Capacitors may change resistance values. (c) Water-solubl e soldering ß ux may have more rema rkable tendencies of (a) an d (b) above compared to those of rosin soldering ß ux.(2) Excessive cleani ng can lead to: (a) Over use of ultrasonic clea ning may deteriorate the strength of the terminal electrodes or cause cracking in the solder and /or ceramic bod- ies of the Capacitors due to vibration of the PC boards. Please follow these conditions for Ultrasonic cleaning: Ultrasonic wave output : 20 W/L max. Ultrasonic wave freq uency : 40 kHz max. Ultrasonic wave cleani ng time : 5 min max. 6.3 Contamination of Cleaning Solvent Cleaning with contaminated cleaning solvent may cause the same re sults as insufÞ cient cleaning due to the high dens ity of liberated halogen. 7.Inspection Process When mounted PC boards ar e inspected with measur- ing terminal pins , abnormal and excess mechanical stress shall not be applied to the PC board or mount- ed components, to prevent failure or damage to the de- vices.(1) Mounted PC boards shall be supported by an adequate number of supp orting pins with bend settings of 90 mm span 0.5 mm max. 00Sep. 2008 Design and speciÞ cations are each subject to change without notice. Ask factory for the current technical speciÞ cations before purchase and/or use.Should a safety concern arise regarding this product, please be sure to contact us immediately. Multilayer Ceramic Capacitors Œ EC53 Œ Supportingpin Separated,Crack Checkpin Checkpin BendingTorsionPCboard splittingjig V-groovePCboard OutlineofJig PCboardChipcomponentLoadpositionV-grooveLoadadirection PCboardChipcomponentLoadposition V-grooveLoaddirection FloorCrackMountedPCB Crack8.Protective Coat When the surfac e of a PC board on which the Capacitors have been mounted is coated with resin to protect against moisture and dust , it shall be conÞ rmed that the protective coat ing which is corrosive or chemically active is not used, in order that the reliability of the Capacitors in the actual equipment may not be inß uenced. Coating mate rials that expand or shrink also may lead to damage to the Capa citors during the curing process. 9.Dividing/B reaking of PC Boards (1) Abnormal and excessive me chanical stress such as bending or torsion shown below can cause cracking in the Capacitors. Prohibited di vidingRecommen ded dividing (2) D ividing/Breaking of the PC boards shall be done carefully at modera te speed by using a jig or apparatus to prevent the Capacitors on the boards from mechanical damage. (3) Examples of PCB d ividing/breaking jigs: The outlin e of a PC board breaking jig is shown below. When PC boards ar e broken or divided, loading points should be clos e to the jig to minimize the extent of the bending Also, planes with no parts mounted on should be used as plane of loading, which generates a compressive stress on the mounted plane, in order to prev ent tensil e stress induced by the bending, which may cause cracks of the Capacitors or other part s mounted on the PC boards. Other For special mounti ng conditions, please contact us. Precautions for Us e above are from The Technical Report EI AJ RCR-2335 Caution Guide Line for Operation of Fixed Multilayer Ceramic Capacitors for Electronic Equipment by Japan Electronic s and Information Technology Industries Association (March 2002 issued) Please refer to above technical report for details. (2) ConÞ rm that the measuring pi ns have the right tip shape, are equa l in height and are set in the correct positions. The foll owing Þ gures are for your reference to avoid bending the PC board. ItemProhibited setting Recommende d setting Bendin g of PC board 10.Mechani cal Impact (1) The Capacitors shall be free from any excessive mechanical impact. The Capacito r body is made of ceramics and may be damaged or cracked if dropped. Never us e a Capacitor which has been dropped; their quality may be impaired and failure rate increased. (2) When handling PC boards with Capa citors mounted on them, do not al low th e Capacitors to collide with another PC board. When mounted PC boards ar e handled or stored in a stacked state, impact between the corner of a PC board and th e Capacitor may cause damage or cracking and can deteriorate the withstand voltage and insulation resistance of the Capacitor. 00Sep. 2008
updated: 2021-08-05 16:24:59